Low-Power, Low-Phase-Noise CMOS Voltage-Controlled- Oscillator with Integrated LC Resonator

The recent rapid growth in demand for wireless communications has been a strong motivation for designing more highly integrated RF ICs like low-noise amplifiers (LNAs), upand down-frequency converters, voltagecontrolled oscillators (VCOs), and frequency synthesizers into a single die with low power consumption and cost, while meeting performance requirements for wireless communications systems. Frequency synthesis for the local oscillator (LO) signal is one of the major challenges in designing a cheap transceiver system. The frequency synthesis is usually done using a phase-locked loop (PLL) [6]. Fig. 1 shows the simplified block diagram of a PLL-based frequency synthesizer. The synthesizer consists of a phase/frequency detector (PFD), a low-pass filter (LPF), a voltage-controlled oscillator, and a programmable divider N. When the PLL is in lock mode, the output frequency fout is N times the reference frequency fref . Since the reference frequency is usually generated by a very stable crystal oscillator, the spectral purity of the synthesized signal is largely dependent on the quality of the signal generated by an on-chip VCO. Although ring oscillators can be used in the PLL-based frequency synthesis with wide loop bandwidth to reduce the effects of noise contribution of the ring oscillator, these techniques are still not sufficient enough to generate an LO signal with high quality. One approach to ensuring an LO signal with minimal phase noise is to use a high-quality LC resonator for the VCO [3–7]. In this paper, VCOs that use on-chip planar inductors and varactors in the LC resonant circuits is presented.